Half-day tutorial at SC 24, November 17-122, 2024, Atlanta, GA:
Performance Engineering for Linear Solvers
Authors/Presenters
Christie Alappat1, Hartwig Anzt2, Georg Hager1, and Jonas Thies3
1 Erlangen National High Performance Computing Center (NHR@FAU), FAU Erlangen-Nürnberg, Germany
2 TUM School of Computation, Information and Technology, TU München Campus Heilbronn, Germany
3 Delft Institute of Applied Mathematics, TU Delft, The Netherlands
Abstract
This tutorial covers code analysis, performance modeling, and optimization for linear solvers on CPU and GPU nodes. Performance Engineering is often taught using simple loops as instructive examples for performance models and how they can guide optimization; however, full, preconditioned linear solvers comprise multiple back-to-back loops enclosed in an iteration scheme that is executed until convergence is achieved. Consequently, the concept of “optimal performance” has to account for both hardware resource efficiency and iterative solver convergence. We convey a performance engineering process that is geared towards linear iterative solvers. After introducing basic notions of hardware organization and storage for dense and sparse data structures, we show how the Roofline performance model can be applied to such solvers in predictive and diagnostic ways and how it can be used to assess the hardware efficiency of a solver, covering important corner cases such as pure memory boundedness. Then we advance to the structure of preconditioned solvers, using the Conjugate Gradient Method (CG) algorithm as a leading example. Hotspots and bottlenecks of the complete solver are identified followed by the introduction of advanced performance optimization techniques like preconditioning and cache blocking.
Hands-on code
The code used during the hands-on exercises is available at: https://github.com/RRZE-HPC/PELS