Georg Hager's Blog

Random thoughts on High Performance Computing


ISC17 Workshop

Performance Engineering for HPC: Implementation, Processes, and Case Studies

June 22, 2017, Frankfurt Marriott

Workshop co-chairs: Georg Hager (RRZE), Gerhard Wellein (FAU), Matthias S. Müller (RWTH Aachen)

Workshop scope:

The days of mystic “black-box” performance engineering (PE) of computer programs are gone. Modern tools have entered the scene, endowing developers with an unprecedented level of analysis of code performance. However, as we face more and more complex system architectures, HPC experts have an even more vital role to play when it comes to code optimization and parallelization. Making sense of performance data and taking the right action for the problem at hand are still daunting tasks. Automatic frameworks may provide local solutions but do not deliver deeper insight for long-term performance-aware code development in a universe of increasing hardware diversity and code intricacy. Consequently, computing centers and HPC developer communities provide human assistance to support end users at various levels of sophistication.

This workshop gives an overview of PE activities at computing centers and CSE research communities, highlighting structured, process-oriented approaches. The presentations span a range of topics, from structural issues in providing the right level of service to application programmers conducting actual performance optimizations. The workshop will thus be of wide interest to decision makers, HPC experts, tool developers, and programmers alike.

Preliminary agenda

Time Speaker Title
9:00am-9:40am Torsten Hoefler, ETH Zürich Scientific benchmarking of parallel computer systems
9:40am-10:20am Jesus Labarta, Barcelona Supercomputing Center TBA
10:20am-11:00am Alexander Reinefeld, Zuse Institut Berlin Performance Engineering on Cray XC40 with Xeon Phi KNL
11:00am-11:30am Coffee break
11:30am-12:15pm Jan Eitzinger, Erlangen Regional Computing Center  TBA
12:15pm-1:00pm Christian Bischof, University of Darmstadt The Hessian competence network for high performance computing
1:00pm-2:00pm Lunch
2:00pm-2:40pm Harald Köstler, Chair for System Simulation, FAU Erlangen-Nürnberg Software Eingineering meets Performance Engineering
2:40pm-3:20pm Dirk Pleiter, Jülich Supercomputing Centre Performance Engineering for Lattice Quantum Chromodynamics simulations
3:20pm-4:00pm Robert Henschel, Indiana University TBA
4:00pm-4:30pm Coffee break
4:30pm-5:10pm Cyrus Proctor, Texas Advanced Computing Center Pragmatic performance: A survey of optimization support at the Texas Advanced Computing Center
5:10pm-5:20pm Workshop organizers Closing remarks